4.1.1. SR PCE Capability Sub-TLV

The SR-PCE-CAPABILITY sub-TLV is defined in Section 4.1.2 of [RFC8664] to be included in the PATH-SETUP-TYPE-CAPABILITY TLV.¶

This document defines the following flag in the SR-PCE-CAPABILITY Sub-TLV Flags field:¶

S (SR-Algorithm Capability) - bit 5:

If the S flag is set to 1, a PCEP speaker indicates support for the Algorithm field and the Subobject Extension Block in the SR-ERO subobject described in Section 4.2 and the SR-Algorithm TLV described in Section 4.4 for LSPs set up using Path Setup Type 1 (Segment Routing) [RFC8664]. It does not indicate support for these extensions for other Path Setup Types. If the S flag is set to 0, behavior reverts to the procedures defined in existing specifications prior to the introduction of this extension.¶

4.1.2. SRv6 PCE Capability Sub-TLV

The SRv6-PCE-CAPABILITY sub-TLV is defined in Section 4.1.1 of [RFC9603] to be included in the PATH-SETUP-TYPE-CAPABILITY TLV.¶

This document defines the following flag in the SRv6-PCE-CAPABILITY Sub-TLV Flags field:¶

SR-Algorithm Capability (S) - bit 13:

If the S flag is set to 1, a PCEP speaker indicates support for the Algorithm field in the SRv6-ERO subobject described in Section 4.3 and the SR-Algorithm TLV described in Section 4.4 for LSPs set up using Path Setup Type 3 (SRv6) [RFC9603]. It does not indicate support for these extensions for other Path Setup Types. If the S flag is set to 0, behavior reverts to the procedures defined in existing specifications prior to the introduction of this extension.¶

4.2.1. Subobject Extension Block

The Subobject Extension Block is an optional, extensible field in the SR-ERO subobject. Its presence is indicated by the setting of any SEBF in the subobject's Flags field (e.g., the A flag defined in this document or flags defined by future specifications).¶

Block length and presence:

• If the A flag is set, and no other SEBF is set, the block length MUST be 4.¶

• The block length is at least 4 bytes when present.¶

• The block length MUST always be a multiple of 4 bytes.¶

• The block MUST be included if any SEBF is set in the Flags field.¶

• Future extensions may define additional SEBFs and corresponding fields, allowing the block to be increased in size beyond the initial 4 bytes as needed.¶

The first 4 bytes of the Subobject Extension Block are described in Figure 2.¶

  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |                 Unassigned                    |  Algorithm    |
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

Unassigned (24 bits):

This field is reserved for future use and MUST be set to zero when sending and ignored when receiving.¶

Algorithm (8 bits):

The SR-Algorithm value from the "IGP Algorithm Types" registry of the "Interior Gateway Protocol (IGP) Parameters" registry group (see [IANA-ALGORITHM-TYPES]).¶

Future extensions SHOULD first use the Unassigned portion of the initial 4 bytes to carry new information. If additional space is needed, the Subobject Extension Block may be extended in 4-byte increments. Each such extension must be indicated by a dedicated SEBF in the Flags field (similar to the A flag) and must be accompanied by capability signaling in an appropriate capability sub-TLV. The specific sub-TLV to be used is not restricted by this specification and may include, for example, the SR-PCE-CAPABILITY sub-TLV, the SRv6-PCE-CAPABILITY sub-TLV, or other capability TLVs, depending on the context of the extension. Interoperability procedures and the precise signaling mechanisms for each new SEBF and its associated capability will be defined by future specifications or procedures describing those extensions.¶

When receiving a Subobject Extension Block longer than 4 bytes, receivers that do not recognize or have not negotiated support for additional flags MUST ignore the unknown additional bytes beyond those defined in this document.¶

4.2.2. Guidance for Future Extensions

Future enhancements extending the Subobject Extension Block must:¶

• Define a new SEBF in the Flags field to indicate the presence of a new extension and specify the corresponding capability signaling for that extension.¶

• Specify which parts of the reserved/extension block are used and how the block length is calculated when their extension is present.¶

• The reserved bits in the initial 4 bytes are used when possible, and the block is extended only when additional space is necessary.¶

• Future extensions may define additional SEBFs and corresponding fields, allowing the block to be increased in size beyond the initial 4 bytes as needed.¶

Example: Future extension introducing a Z flag and a new Z field (8 bits):¶

• If the A flag and/or the Z flag are set, the Subobject Extension Block is included. The Z field may use 8 bits of the reserved portion. A field is only considered valid if its corresponding flag is set. For example, if the Z flag is set to 1 but the A flag is set to 0, the Z field is valid but the Algorithm field is ignored.¶

• If space beyond the initial 4 bytes is needed, the extension document specifies the new block layout and total length. To simplify parsing, if a flag for such an extension is set, the full extended block is encoded, including the initial 4 bytes, even if the A flag is set to 0.¶

4.5.1. Path Min Delay Metric

[RFC7471] and [RFC8570] define the "Min/Max Unidirectional Link Delay" sub-TLV to advertise the link minimum and maximum delay in microseconds in a 24-bit field.¶

[RFC5440] defines the METRIC object with a 32-bit metric value encoded in IEEE floating point format (see [IEEE.754.2008]).¶

The encoding for the Path Min Delay metric value is quantified in units of microseconds and encoded in IEEE floating point format.¶

For use in the PCEP METRIC object, the 24-bit unsigned integer delay value is converted to a 32-bit IEEE floating point value. This conversion follows the procedure specified in [IEEE.754.2008].¶

4.5.2. Path Bandwidth Metric

Section 4 of [RFC9843] defines a new metric type, "Bandwidth Metric", which may be advertised in their link metric advertisements.¶

When performing Flexible Algorithm path computation as described in Section 5.2.2, procedures described in Sections 4.1 and 5 from [RFC9843] MUST be followed with automatic metric calculation.¶

For path computations in contexts other than Flexible Algorithm (including Path Setup Types other than 1 or 3 for SR-MPLS and SRv6, respectively), if the Generic Metric sub-TLV with the Bandwidth metric type is not advertised for a link, the PCE implementation MAY apply a local policy to derive a metric value (similar to the procedures in Sections 4.1.3 and 4.1.4 of [RFC9843]) or the link MAY be treated as if the metric value is unavailable (e.g., by using a default value). If the Bandwidth metric value is advertised for a link, the PCE MUST use the advertised value to compute the path metric in accordance with Sections 4.5.2.1 and 4.5.2.2.¶

The Path Bandwidth metric value is encoded in IEEE floating point format (see [IEEE.754.2008]).¶

For use in the PCEP METRIC object, the 24-bit unsigned integer delay value is converted to a 32-bit IEEE floating point value. This conversion follows the procedure specified in [IEEE.754.2008].¶

4.5.3. User-Defined Metric

Section 2 of [RFC9843] defined a new metric type range for "user-defined metric", which may be advertised in their link metric advertisements. These are user defined and can be assigned by an operator for local use.¶

User-defined metric values are encoded using the IEEE floating point format (see [IEEE.754.2008]).¶

For use in the PCEP METRIC object, the 24-bit unsigned integer delay value is converted to a 32-bit IEEE floating point value. This conversion follows the procedure specified in [IEEE.754.2008].¶

The metric type range was chosen to allow mapping with values assigned in the "IGP Metric-Type" registry. For example, the user-defined metric type 130 of the METRIC object in PCEP can represent the sum of the user-defined metric 130 of all links along a P2P path.¶

User-defined metrics are equally applicable to P2P and P2MP paths.¶

5.1.1. SR-ERO

A PCEP speaker MAY set the A flag and include the Algorithm field as part of the Subobject Extension Block in an SR-ERO subobject if the S flag has been advertised in the SR-PCE-CAPABILITY sub-TLV by both PCEP speakers.¶

If the PCEP peer receives an SR-ERO subobject with the A flag set but the S flag was not advertised in SR-PCE-CAPABILITY sub-TLV, then it MUST consider the entire ERO as invalid, as described in Section 5.2.1 of [RFC8664].¶

The Subobject Extension Block field in the SR-ERO subobject MUST be included after the optional SID, NAI, or SID structure, and the length of the SR-ERO subobject MUST be increased by the size of the Subobject Extension Block, as determined by the set of SEBFs.¶

If the length and the A flag are not consistent, as specified in Section 4.2, the PCEP peer MUST consider the entire ERO invalid and MUST send a PCErr message with Error-Type = 10 ("Reception of an invalid object") and Error-value = 11 ("Malformed object").¶

If the SID value is absent (S flag is set to 1), the NAI value is present (F flag is set to 0), and the Algorithm field is set (the A flag is set to 1), the PCC is responsible for choosing the SRv6-SID value based on values specified in the NAI and Algorithm fields. If the PCC cannot find a SID index in the SR-DB, it MUST send a PCErr message with Error-Type = 10 ("Reception of an invalid object") and Error-value = 14 ("Unknown SID").¶

5.1.2. SRv6-ERO

A PCEP speaker MAY set the A flag and include the Algorithm field in an SRv6-ERO subobject if the S flag has been advertised in SRv6-PCE-CAPABILITY sub-TLV by both PCEP speakers.¶

If the PCEP peer receives an SRv6-ERO subobject with the A flag set or with the SR-Algorithm included, but the S flag was not advertised in SRv6-PCE-CAPABILITY sub-TLV, then it MUST consider the entire ERO as invalid, as described in Section 5.2.1 of [RFC8664].¶

The Algorithm field in the SRv6-ERO subobject MUST be included in the position specified in Section 4.3; the length of the SRv6-ERO subobject is not impacted by the inclusion of the Algorithm field.¶

If the SRv6-SID value is absent (S flag is set to 1), the NAI value is present (F flag is n), and the Algorithm field is set (the A flag is set to 1), the PCC is responsible for choosing the SRv6-SID value based on values specified in the NAI and Algorithm fields. If the PCC cannot find a SID index in the SR-DB, it MUST send a PCErr message with Error-Type = 10 ("Reception of an invalid object") and Error-value = 14 ("Unknown SID").¶

5.2.1. Path Computation for SR-Algorithms 0-127

The SR-Algorithm constraint acts as a filter, restricting which SIDs may be used as a result of the path computation function. Path computation is done based on optimization metric type and constraints specified in the PCEP message received from the PCC.¶

The mechanism described in this section is applicable only to SR-Algorithm values in the range 0-127. It is not applicable to Flexible Algorithms (range 128-255), which are handled as described in Section 5.2.2. Within the 0-127 range, currently defined algorithms are 0 (Shortest Path First (SPF)) and 1 (Strict-SPF), as introduced in Section 3.1.1 of [RFC8402]. Future algorithms defined within this range that do not require explicit PCEP extensions beyond the SR-Algorithm TLV may also utilize this SID filtering approach. If a PCE implementation receives a request with an SR-Algorithm value in the 0-127 range that it does not support for path computation, it MUST reject the PCEP message and send a PCErr message with Error-Type 19 (Invalid Operation) and Error-value 34 (Unsupported combination of constraints).¶

5.2.2. Path Computation for Flexible Algorithms

This section is applicable only to the Flexible Algorithms range of SR-Algorithm values. The PCE performs Flexible Algorithm path computation based on topology information stored in its TED [RFC5440]. The TED is expected to be populated with necessary information, including Flexible Algorithm Definitions (FADs), node participation, and ASLA-specific link attributes, through standard mechanisms, such as Interior Gateway Protocols (IGPs) with Traffic Engineering extensions or BGP - Link State (BGP-LS) [RFC9552].¶

The PCE must follow the IGP Flexible Algorithm path computation logic as described in [RFC9350]. This includes performing the FAD selection as described in Section 5.3 of [RFC9350] and other sections, determining the topology associated with specific a Flexible Algorithm based on the FAD, the node participation (Section 11 of [RFC9350]), using ASLA-specific link attributes (Section 12 of [RFC9350]), and applying other rules for Flexible Algorithm path calculation (Section 13 of [RFC9350]). While [RFC9350] defines the base procedures for IGP Flexible Algorithms, these procedures are further extended by other documents, such as [RFC9843]; a PCE implementation may need to support these IGP extensions to allow use of specific constraints in FAD. [RFC9917] created an IANA registry called "IGP Flex-Algorithm Path Computation Rules" within the "Interior Gateway Protocol (IGP) Parameters" registry group with the ordered set of rules that MUST be used to prune links from the topology during the Flexible Algorithm path computation.¶

The PCE MUST optimize the computed path based on the metric type specified in the FAD. The optimization metric type included in PCEP messages from the PCC MUST be ignored. The PCE MUST use the metric type from the FAD in messages sent to the PCC unless that metric type is not defined in PCEP or not supported by the PCEP peer. It is allowed to use SID types other than Prefix SID (e.g., Adjacency or BSID) but only from nodes participating in the specified SR-Algorithm.¶

There are corresponding metric types in PCEP for IGP and TE metrics from FAD introduced in [RFC9350], but there were no corresponding metric types defined for "Min Unidirectional Link Delay" from [RFC9350] and "Bandwidth Metric" and "User-Defined Metric" from [RFC9843]. Section 4.5 of this document introduces them. Note that the defined "Path Bandwidth Metric" is accumulative and is different from the BANDWIDTH Object defined in [RFC5440].¶

The PCE MUST use the constraints specified in the FAD and also constraints (except optimization metric type) directly included in PCEP messages from the PCC. The PCE implementation MAY decide to ignore specific constraints received from the PCC based on existing processing rules for PCEP Objects and TLVs, e.g., the P flag described in Section 7.2 of [RFC5440] and processing rules described in [RFC9753]. If the PCE does not support a specified combination of constraints, it MUST fail path computation and respond with a PCEP message with a PCInitiate or PCUpd message with an empty ERO or PCRep with NO-PATH object. The PCC MUST NOT include constraints from the FAD in the PCEP message sent to the PCE, as it can result in undesired behavior in various cases. The PCE SHOULD NOT include constraints from the FAD in PCEP messages sent to the PCC.¶

The combinations of the constraints specified in the FAD and constraints directly included in PCEP messages from the PCC may decrease the chance that Flexible-Algorithm-specific Prefix SIDs represent an optimal path while satisfying all specified constraints; as a result, a longer SID list may be required for the computed path. Adding more constraints on top of the FAD requires complex path computation and may reduce the benefit of this scheme.¶